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LNGR SPKRHIFI. TWO WAYS. HANDCRAFTED.
Knowledge / Power, control & measurement
LNGR · Learning workshop

Microcontrollers & analogue signals

A microcontroller does not see analogue voltage continuously. Its ADC maps it to a finite set of codes.

Example package · not a pinout diagram

Start without prior knowledgeUnderstand the model limitsDE / EN
01

The mental picture

A coarse ruler cannot resolve tiny differences. More ADC bits are like finer markings. A crooked ruler stays inaccurate despite many marks: reference error, noise and poor circuitry do not disappear with extra bits.

02

The principle

An n-bit ADC has 2ⁿ codes. Reference voltage sets the measurement range. A divider can scale a larger signal but must suit the ADC input. Many ADCs charge an internal sampling capacitor, which can load a high-impedance source.

03

Try it yourself

Interactive experiment

Microcontrollers & analogue signals

Compare 4 and 12 bits. With few bits, steps are clearly visible. Raise input above reference voltage: the code stays at the upper limit.

Model limits: Ideal unipolar ADC with downward rounding and saturation. No time sampling, noise or input-protection circuit.

04

A worked example

8 bits over 3.3 V gives an ideal step size of about 12.9 mV. At 12 bits it is about 0.806 mV. This is resolution, not guaranteed accuracy.

A closer look · equations and assumptions
Formula notes
N=2^n
\mathrm{LSB}=\frac{V_{\mathrm{ref}}}{N}
\mathrm{Code}=\min\left(N-1,\max\left(0,\left\lfloor\frac{U_{\mathrm{in}}}{\mathrm{LSB}}\right\rfloor\right)\right)

This quantiser rounds down; real ADC transition definitions can differ. Dynamic signals also need a suitable sample rate and analogue anti-aliasing filter. The condition fs > 2·fmax assumes a band-limited input and does not replace filter design.

A common pitfall. A saturated code does not protect a real input from overvoltage. Reference range and absolute pin limits are different specifications.

05

Workshop takeaway

Before calibrating software values, check supply, reference, grounding and input signal. More decimal places do not improve an unstable analogue signal.

Sources & transparency

Original illustrations and educational calculations. No measurements of a specific product. Edited 11 October 2026.

Work it out · answers unfold

Write down your prediction first, then your calculation. Open the answer only when you are ready to compare.

09 · NPN switch: 100 Ω load on 5 V, saturated VCE = 0.2 V. Find load current.

Show worked answer
  1. Load voltage: 4.8 V.
  2. Divide by 100 Ω.
  3. Collector current = 48 mA.
Calculation
I_C=\frac{5-0.2}{100}=48\,mA

10 · For task 9 choose forced current gain 10. What base current should be used?

Show worked answer
  1. Divide load current by forced gain.
  2. Base current = 48/10 = 4.8 mA.
  3. The driver must be able to supply it.
Calculation
I_B=\frac{48\,mA}{10}=4.8\,mA

11 · 3.3 V drive, assumed VBE = 0.8 V and base current 4.8 mA. Find base resistor.

Show worked answer
  1. Base resistor voltage is 2.5 V.
  2. R = 2.5/0.0048.
  3. Base resistor = 521 Ω; check actual driver and datasheet.
Calculation
R_B=\frac{3.3-0.8}{0.0048}\approx521\,\Omega

12 · Find collector-emitter dissipation of the on-state switch in task 9.

Show worked answer
  1. P = saturated VCE · collector current.
  2. 0.2 V · 0.048 A.
  3. P = 9.6 mW, excluding base and switching losses.
Calculation
P_{CE}=0.2\cdot0.048=9.6\,mW

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